The present invention relates generally to communication systems, and, more particularly, to a system for mapping control and user data in a communication system.
Recent improvements in communication systems technology have led to the development of communication standards such as the third generation (3G) and fourth generation (4G) communication standards. The 4G standard is also referred to as the long-term evolution (LTE) standard. According to the LTE standard, a communication system includes an evolved Node B (eNode-B) and multiple user equipments (UEs). Examples of UEs include hand-held devices such as cellular phones, personal digital assistants (PDAs), and laptop computers with mobile broadband adapters. The UEs communicate with the eNode-B over uplink and downlink channels. The uplink channel includes a physical uplink channel, a logical uplink channel, and a transport uplink channel to transmit sets of control and user data from the multiple UEs to the eNode-B. The physical uplink channel includes either first and second dedicated channels for carrying the sets of control and user data, respectively, or a shared channel for carrying both sets of control and user data. The physical uplink channel also includes a physical uplink shared channel (PUSCH) to communicate the sets of control and user data from each of the multiple UEs to the eNode-B. The set of control data includes rank indicator (RI), channel quality information (CQI), hybrid automatic repeat requests (HARQ ACK/NACK), and code block data (CBD).
The eNode-B stores the sets of control and user data in a memory and processes the sets of control and user data in a predetermined sequence with a processor. The predetermined sequence is defined by the LTE standard based on first and second sets of priority values corresponding to the sets of control and user data, respectively. For example, first through fourth priority values are assigned to the RI, CQI, CBD, and HARQ ACK/NACK, respectively. The LTE standard defines the predetermined sequence to ensure that high priority control and user data are accurately processed with minimum delay, as compared to lower priority data.
Generally, the eNode-B receives the control and user data in the predetermined sequence. The memory stores the data in the predetermined sequence so that the processor can read and process the data in the predetermined sequence. However, the eNode-B may not always receive the data in the predetermined sequence due to delays such as processing delays, queuing delays, transmission delays, and propagation delays during the transmission of the data. In such a case, the memory stores the data in the sequence in which it is received. For example, the eNode-B receives and stores the RI and CQI at first and second addresses in the memory, respectively, so the processor then reads and processes the RI first, and then the CQI. However, if the eNode-B receives the CQI before the RI due to a delay in the transmission of the RI, then consequently the memory will store the RI and CQI at the second and first addresses, respectively, and the processor will mistakenly process the CQI as the RI and the RI as the CQI.
One way to ensure accurate processing of the control and user data is to map the control and user data to first and second sets of predetermined addresses, respectively, in the memory. The first and second sets of predetermined addresses are assigned to the control and user data based on corresponding first and second sets of priority values. Thus, the system maps the control and user data to the first and second sets of predetermined addresses, respectively, irrespective of the sequence in which they are received. However, several system clock cycles are needed to search the first and second sets of predetermined addresses in the memory while storing the data which introduces a delay in mapping the data to the predetermined addresses, and in turn processing the data, which is undesirable.
One way to overcome the aforementioned problems is to encode the control and user data, where the eNode-B system writes a set of encoded control data and a set of encoded user data at first and second sets of addresses, respectively, irrespective of the first and second sets of priority values corresponding to the sets of control and user data. The first and second sets of addresses each correspond to consecutive columns of a row of the memory. The system reads the encoded data from third and fourth sets of addresses, respectively. The third and fourth sets of addresses each correspond to consecutive rows of a column of the memory. The system reads the encoded data based on the corresponding first and second sets of priority values. Thus, the system avoids delay introduced for searching the first and second sets of predetermined addresses without compromising the accuracy of processing the sets of control and user data. However, the system fails to check whether other sets of encoded control and user data are already stored at the first and second sets of addresses. Although other sets of encoded data may already be stored at the first and second sets of addresses, the system may map the sets of encoded control and user data to the first and second sets of addresses, thus overwriting the already stored data with the set of encoded data at the first set of addresses, thereby corrupting the already stored set of encoded control data.
It would be advantageous to have a system that is able to quickly and accurately map the control and user data to the memory.